There are several restrictions about what you can and cannot do with GPL source code, which are clearly documented on the GNU web site at. The GPL is a share-alike license, which means that each developer benefits from the efforts and the knowledge of the entire community, adding to the success and growth of the project. This is the same license that the Linux kernel is released under. While not part of coreboot, payloads are integral to a complete coreboot firmware image.Ĭoreboot source code is licensed under the GNU General Public License, version 2 (GPLv2). coreboot is often used to boot Linux, but depending on the payload, it can also boot most versions of BSD, Windows, or any other OS. coreboot supports a number of different payloads, for disk boot, network boot, and legacy BIOS services.

Services, runtime code, and the operating system boot are provided by a payload. Since coreboot is focused on hardware initialization, it does not contain any BIOS or other runtime services. The coreboot hardware initialization framework handles the FSP silicon initialization API, configures system peripherals, and loads the payload. The coreboot philosophy aligns with the Intel FSP philosophy. coreboot is designed to do critical hardware initialization before passing control to a payload. Feel free to skip ahead and come back to these sections if you want.Ĭoreboot is built on the belief that users and vendors deserve an open, fast, customizable, and purpose-built firmware for silicon and mainboard initialization. The final sections include information about payloads, debugging, and optimizations for coreboot. Later in the chapter, we examine the technical details of coreboot, including the binary image structure, the execution flow, and the source code organization. We cover the history of coreboot, coreboot’s open source software development practices-including details on using Git, and how to build a sample coreboot image. The first few sections of this chapter lay the groundwork for working with the coreboot community. In this chapter, we will cover many of the different aspects of coreboot. We are excited to introduce you to the coreboot project. With the support of silicon vendors, coreboot developers are able to develop and release current silicon devices and to concentrate on peripheral and platform customization. Many silicon vendors have tried different solutions to help the developers in the community for example, AMD’s AGESA (AMD Generic Encapsulated Software Architecture), and now, Intel FSP (Firmware Support Package). As silicon has become more complicated, with more features and integrated peripherals, firmware developers have had to rely more and more on the silicon vendors for reference code and binaries for the latest silicon releases. Coreboot firmware deals directly with system hardware configuration.

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